FPGA Verification

Job Description

FPGA Verification

Experience – 3 to 10 yrs

Job Description

– Verification of RTL designs – Block/subsystem/chip level functional verification – Implement verification environment independently in SV using UVM methodology – Feature extraction and coverage have driven verification plan development – Development and execution of test cases – Report test results and assist in RTL debug using simulation

Skills

FPGA/CPLD coding, UVM